Article ID: 000083202 Content Type: Troubleshooting Last Reviewed: 11/09/2018

Why does the Intel® Stratix® 10 10GBASE-KR and 40GBASE-KR Hard PCS get stuck sending out a PRBS pattern?

Environment

  • Intel® Stratix® 10 FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition
  • Low Latency 40G 100G Ethernet
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    When using the Intel® Stratix® 10 10GBASE-KR PHY IP, the Low Latency Ethernet 10G MAC Intel® Stratix® 10 FPGA IP, the Stratix® 10 Low Latency 40-Gbps Ethernet IP or the L-Tile/H-Tile Transceiver Native PHY Intel Stratix 10 FPGA IP in 10G or 40G KR modes, the hard PCS can get stuck sending out PRBS pattern if a csr reset comes in during reconfiguration to data mode.

    Resolution

    To work around this problem, use Auto-Negotiation(AN) or Link Training(LT) reconfiguration to clear this state.

    This problem will be fixed in a future release of the Intel® Quartus® Prime software.

    Disclaimer

    1

    All postings and use of the content on this site are subject to Intel.com Terms of Use.