Due to a problem in the simulation testbench of the example design generated by the Quartus® Prime Pro Software version 17.1.1, the simulation fails to complete. You will see the simulation hang at packet 10 as shown below.
***************************************************
************** Recieve Ready ******************
***************************************************
Transmitting test data
** Sending Packet 1...
** Sending Packet 2...
** Sending Packet 3...
** Sending Packet 4...
** Sending Packet 5...
** Sending Packet 6...
** Sending Packet 7...
** Sending Packet 8...
** Sending Packet 9...
** Sending Packet 10...
To work around this problem, replace the original generated testbench <your example project>/example_testbench/basic_avl_tb_top.v with this new testbench.
This problem is scheduled to be fixed in a future version of the Quartus® Prime Pro Software.