Article ID: 000082666 Content Type: Troubleshooting Last Reviewed: 07/26/2018

Why do PRBS checks fail on the Intel® Arria® 10 Low Latency 40-GbE IP through reconfiguration interface?

Environment

    Low Latency 40G Ethernet Intel® FPGA IP for Arria® 10 and Stratix® V
    Low Latency 40G 100G Ethernet
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Description

If the hard PRBS checker is enabled via the reconfiguration interface of the Intel® Arria® 10 Low Latency 40-GbE IP core, it will fail due to PCS logic always asserting rx_digitalreset.

Resolution

To use the hard PRBS checker, enable ADME (Altera® Debug Master Endpoint) and use Transceiver Tool Kit (TTK) to enable the PRBS checking.

Related Products

This article applies to 1 products

Intel® Arria® 10 GT FPGA

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