Article ID: 000081496 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Do PLL banks in the Stratix® device family support voltage referenced I/O standards?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description Yes, Stratix support voltage referenced I/O standards when using the pins in the PLL banks as user I/O. PLL banks will use the VREF voltage of its adjacent bank. Banks 9 and 10 get their VREF from bank 3 Banks 11 and 12 get their VREF from bank 8

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This article applies to 1 products

Stratix® FPGAs