Article ID: 000080540 Content Type: Product Information & Documentation Last Reviewed: 10/14/2013

How do I constrain the osc output pin for ALTUFM megafunctions?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

To constrain the optional osc output pin on ALTUFM_NONE, ALTUFM_I2C, ALTUFM_SPI, and ALTUFM_PARALLEL megafunctions, use either of the following methods:

  • Constrain the clock automatically by using the derive_pll_clocks command. Note that in addition to creating generated clocks for PLL outputs, the derive_pll_clocks command also creates clock constraints for internally-generated clocks.
  • Constrain the clock manually by using the following command:
    create_clock -period 181.818 -name <name> <hierarchical path to ufm_block>|osc
    • Although actual output frequency may vary, constraining the osc pin to 181.818 ns (5.5 MHz) ensures the clock is analyzed at its minimum possible period (maximum possible frequency).

Related Products

This article applies to 3 products

MAX® II CPLDs
MAX® II Z CPLD
MAX® V CPLDs

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