Why does the DMA write performance of the Intel® Stratix® 10 PCIe* Avalon®-MM Hard IP  implemented in Platform Designer degrade with Intel® Quartus® Prime Pro version 19.1?

Quartus Edition

Intel® Quartus® Prime Pro Edition

Version Found: 19.1 Version Fixed: 19.2

FPGA Intellectual Property

QSYS Example Designs

Avalon-MM Intel® Stratix® 10 Hard IP for PCI Express

Avalon-MM Intel® Stratix® 10 Hard IP+ for PCI Express

Avalon-MM Stratix® V Hard IP for PCI Express Intel® FPGA IP

Version Found: 19.1 Version Fixed: 19.2