Article ID: 000080039 Content Type: Troubleshooting Last Reviewed: 11/23/2011

QDR II and QDR II SRAM Controller with UniPHY IP Core May Not Operate Below 167MHz

Environment

    Quartus® II Subscription Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT

Critical Issue

Description

The IP core may not operate reliably at memory clock frequencies less than 167MHz.

Resolution

Do not use the IP core at memory clock frequencies less than 167MHz for Stratix III or Stratix IV devices.

Related Products

This article applies to 2 products

Stratix® III FPGAs
Stratix® IV FPGAs

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