Article ID: 000078958 Content Type: Product Information & Documentation Last Reviewed: 07/25/2023

How can I choose my own reset pin location for npor when using the soft reset controller for the Hard IP for PCI Express?



To use your own reset pin location for npor, first, ensure that you are using the soft reset controller by checking that the hip_hard_reset_hwtcl parameter is set to 0 in your instantiation of the Hard IP for PCI Express®:

.hip_hard_reset_hwtcl                     (0),

To utilize the npor port as the Hard IP reset signal, edit the following files as shown below:

altpcie_sv_hip_128bit_atom.v - for Stratix® V

altpcie_av_hip_128bit_atom.v - for Arria® V and Cyclone® V

Change from:



.pinperstn((USE_HARD_RESET == 0)?1’b1 : pin_perst)

You can now choose any reset pin location for your npor signal.


There is no plan to fix this in the future release.

Related Products

This article applies to 13 products

Stratix® V GX FPGA
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Arria® V GT FPGA
Stratix® V GT FPGA
Arria® V GZ FPGA
Cyclone® V GX FPGA
Arria® V ST SoC FPGA
Arria® V SX SoC FPGA
Cyclone® V SE SoC FPGA
Cyclone® V ST SoC FPGA
Cyclone® V SX SoC FPGA