Due to a problem in the Quartus® II software version 12.0 SP1 and earlier, you may see this warning message during the Fitter stage if you assign the Fast Input Register, Fast Output Register, or Fast Output Enable Register logic option to a dual-purpose DCLK pin. This problem affects designs targeting Stratix® V, Arria® V, and Cyclone® V devices. The register will not be packed if assigned to a dual-purpose DCLK pin.
This problem is fixed beginning with the Quartus II software version 12.1.