Yes, when working with the LVDS I/O standard, the LVDS signaling properties of the buffer should be your focus, not the power source of the buffer. As long as the common mode range and the differential voltage swing is compatible between the two devices there will be no problem and you can DC couple the interface. It is important to power the buffer by the recommended voltage level for that device to ensure the buffer functions as specified.
For example, consider the case of a Stratix® device (VCCIO for LVDS is 3.3V) driving a Cyclone® II device (VCCIO for LVDS is 2.5V). The Stratix Vocm is between 1.125V and 1.375V with a Vod between 250mV and 550mV. The Cyclone II receiver requires a common mode range anywhere between 100mV and 2.0V with a differential swing anywhere between 100mV and 650mV. The Stratix LVDS output buffer signal range is well within the Cyclone II receiver signal range even though the buffers are physically powered by different voltages.
For a Cyclone II driving a Stratix device, we can perform the same analysis. The Cyclone II Vocm is between 1.125V and 1.375V with a differential swing between 250mV and 600mV. Notice this is very similar to the Stratix LVDS output specifications. The Stratix receiver has a common mode range between 1.1V and 1.6V with a differential swing between 200mV and 1.0V. Once again, the Cyclone II transmitter specifications are well within the Stratix receiver specifications.
Using the above analysis, you can compare the LVDS specifications for devices that use different voltage supplies to power their differential buffers to validate the interface.