Article ID: 000078170 Content Type: Troubleshooting Last Reviewed: 04/18/2023

What is the minimum ttx_digitalreset duration for the Intel® Stratix® 10 H-Tile devices?

Environment

    Intel® Quartus® Prime Pro Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The minimum ttx_digitalreset duration for the Intel® Stratix® 10 H-Tile devices is 20 ns.

Resolution

This information is missing from the Intel® Stratix® 10 Device Datasheet (S10-DATASHEET 2017.05.08) and Stratix® 10 H-Tile Transceiver PHY User Guide (UG-20055 2017.06.06).

Related Products

This article applies to 1 products

Intel® Stratix® 10 FPGAs and SoC FPGAs

1

Need more help?

Contact support

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.