DisplayPort FieldID_Flag Not Always Updated Right After the Last Active Line

The DisplayPort specification requires the VB-ID bit 1 FieldID_Flag to be set to 0 right after the last active line in the top field and be set to 1 right after the last active line of the bottom field for interlaced video trasmission.

The Altera DisplayPort TX core does not always guarantee this behavior. The core should update the FieldID_Flag bit at the first vertical blanking line after the last active line. However, the core may, at times, only update the FieldID_Flag bit at the second vertical blanking line after the last active line.

This non compliance to the DisplayPort specification may cause interoperability issues with some devices.

There is no workaround for this issue.

This issue is fixed in version 16.1 of the DisplayPort IP core.