Article ID: 000077839 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why do I get the following Error: "Unknown problem in <subdesign path>(%DLS-E-BadCreSig, Unit DLS_STD:STANDARD.VHDL View creation date mismatch (older)(used by unit DLS_MAXPLUS_PROJECT:.VHDLView)?"

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description This error may occur in the MAX PLUS II sfotware when you try to compile a VHDL design that has a different VHDL version than the one specified in a VHDL package.

For example, if you try to compile a VHDL package using VHDL 1987, and then attempt to compile the whole VHDL design using VHDL 1993, you will receive the error.

To avoid this error, you must use the same VHDL version for all packages and the top level design (i.e., use either VHDL 1987 or VHDL 1993. Do not use both).

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Intel® Programmable Devices