Article ID: 000077711 Content Type: Troubleshooting Last Reviewed: 05/17/2017

Are there any problems simulating the ATX PLL Reconfiguration Profile feature using Arria 10 devices?

Environment

    Intel® Quartus® Prime Pro Edition
    Transceiver ATX PLL Intel® Arria® 10 Cyclone® 10 FPGA IP
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a problem in the Quartus® Prime software, the "Enable control and status registers" option in the Arria® 10 ATX PLL IP is not enabled by default which doesn’t allow the profile to be streamed to the new configuration.

Resolution

This problem has been fixed in Quartus Prime software versions 17.0 and later. For earlier versions of Quartus Prime software, the user should enable the "Enable control and status registers" in the Arria 10 ATX PLL IP.

Related Products

This article applies to 1 products

Intel® Arria® 10 FPGAs and SoC FPGAs

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