Article ID: 000077435 Content Type: Troubleshooting Last Reviewed: 04/24/2023

Is the transceiver Standard PCS 8B/10B decoder compliant to the Fibre Channel specification in Altera® Arria® V, Cyclone® V GX, and Stratix® V devices?

Environment

    Intel® Quartus® Prime Pro Edition
    Arria® V Transceiver Native PHY Intel® FPGA IP
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

No, the transceiver Standard PCS 8B/10B decoder is not fully compliant to the Fibre Channel specification in Altera® Arria V, Cyclone® V GX, and Stratix® V devices. 

The Fibre Channel protocol requirements for "Detection of Invalid transmission Word" for certain data rates state that Ordered Sets received with incorrect beginning running disparity be flagged as an error. The Altera® Arria V, Cyclone® V GX, and Stratix® V devices device 8B/10B decoder determines running disparity on a character-by-character basis and not Ordered Sets. 

Due to this non-compliance, you may or may not be able to use the transceiver Standard PCS 8B/10B decoder.

Resolution

To work around this problem you can implement Fibre Channel compliant 8B/10B decoding in the FPGA core.

Related Products

This article applies to 6 products

Stratix® V FPGAs
Arria® V FPGAs and SoC FPGAs
Cyclone® V GX FPGA
Cyclone® V GT FPGA
Cyclone® V SX SoC FPGA
Cyclone® V ST SoC FPGA

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