Article ID: 000077411 Content Type: Troubleshooting Last Reviewed: 06/07/2019

What are the Intel® Stratix® 10 E-Tile Native PHY IP Core Initial Adaptation Effort Levels?


  • Intel® Quartus® Prime Pro Edition

    An Intel® Stratix® 10 E-Tile Native PHY IP core has two main receiver adaptation modes. Initial adaptation is used to calibrate the PMA to known good settings. For more information on its usage model, please refer to the E-Tile Transceiver PHY User Guide.

    Initial adaptation can be run with 3 different effort levels which impact the time needed to complete:

    1. Low Effort (00_effort) – used for NRZ Ethernet AN/LT and CPRI protocols only and quickest to complete.

    2. Medium Effort (05_effort) – used for PAM4 Ethernet AN/LT only to meet IEEE link up time of 3s.

    3. Full Effort (10_effort) – general usage (NRZ and PAM4) that provides best performance and stability, takes the most time to complete – most recommended calibration mode.

    Register 0x200, Bits [1:0], can be set to pick the effort level:

    [1:0] = 0 – 00_effort

    [1:0] = 1 – 05_effort

    [1:0] = 2 – 10_effort

    Here are example register writes for using initial adaptation, internal or serial loopback, PRBS31, and running full effort initial adaptation:

    0x200[7:0]: 8’hD2

    0x201[7:0]: 8’h02

    0x202[7:0]: 8’h01

    0x203[7:0]: 8’h96

    The emboldened "2" above can be changed to either a 1 (for medium effort) or a 0 (for low effort) initial adaptation.

    Related Products

    This article applies to 3 products

    Intel® Stratix® 10 MX FPGA
    Intel® Stratix® 10 TX FPGA
    Intel® Stratix® 10 FPGAs and SoC FPGAs