Due to a problem in the Intel® SoC FPGA Embedded Development Suite (SoC EDS), Preloader for Cyclone® V and Arria® V cannot compile when CONFIG_SPL_FPGA_LOAD macro is defined in software/spl_bsp/uboot-socfpga/include/configs/socfpga_common.h, and SDRAM ECC is enabled.
To avoid this error, 'memset' function should be disabled with the #if/#endif macro below.
software/spl_bsp/uboot-socfpga/arch/arm/cpu/armv7/socfpga/spl.c(245)
/* do memory padding as data in SDRAM */
#if (CONFIG_HPS_SDR_CTRLCFG_CTRLCFG_ECCEN == 1)
filesize = file_fat_read(CONFIG_SPL_FPGA_FAT_NAME, NULL, 0);
if (filesize != -1) {
memset((unsigned char *)((temp_sdram filesize)
& ~(CONFIG_SPL_SDRAM_ECC_PADDING - 1)),
0, CONFIG_SPL_SDRAM_ECC_PADDING);
}
#endif