Article ID: 000077228 Content Type: Troubleshooting Last Reviewed: 09/01/2014

Why does my Arria V, Cyclone V, or Stratix V device Transceiver Toolkit design show a greyed out System Console panel when using Quartus II software version 14.0?

Environment

    Quartus® II Subscription Edition
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Description

Your Arria® V, Cyclone® V, or Stratix® V device Transceiver Toolkit design may show a greyed out System Console panel when using Quartus® II software version 14.0 if there isn't a transceiver PHY at address 0x0000 of the QSYS memory map.

Resolution

To work around this problem, open your transceiver toolkit design QSYS system and place your first transceiver PHY IP at address 0x0000.

After placing your transceiver PHY IP at QSYS address 0x0000 you must recompile your Quartus II project.

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Related Products

This article applies to 16 products

Stratix® V GT FPGA
Cyclone® V SX SoC FPGA
Stratix® V FPGAs
Cyclone® V GT FPGA
Stratix® V GX FPGA
Stratix® V GS FPGA
Arria® V GZ FPGA
Arria® V SX SoC FPGA
Cyclone® V GX FPGA
Cyclone® V SE SoC FPGA
Cyclone® V ST SoC FPGA
Arria® V ST SoC FPGA
Arria® V GX FPGA
Arria® V FPGAs and SoC FPGAs
Arria® V GT FPGA
Cyclone® V FPGAs and SoC FPGAs

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