Description
This error may occur if you are trying to model a DFF with multiple control signals. The Quartus® II software will only infer a secondary signal from a single secondary signal in an
IF condition. For example, you may have written the following sample structure to model a DFF primitive that can be reset by two signals, rst1 or rst2:
always @ (posedge clk or posedge rst1 or posedge rst2)
begin
if (rst1 == 1'b1 || rst2 == 1'b1)
q <= 1'b0;
else
q <= d;
end
To correct this, edit the design to specify only one edge per if condition. For example, if you were to edit the previous example to specify only one edge per if condition, the Quartus II software would then succesfully recognize the DFF primitive. The sample code would then appear as follows:
always @ (posedge clk or posedge rst1 or posedge rst2)
begin
if (rst1 == 1'b1)
q <= 1'b0;
else if (rst2 == 1'b1)
q <= 1'b0;
else
q <= d;
end
Alternatively, you could generate the OR of rst1 and rst2 outside the Always construct.
This limitation will be addressed in a future version of the Quartus II software.