Article ID: 000076999 Content Type: Troubleshooting Last Reviewed: 01/01/2015

Why do I see the following message when attempting to start Transceiver Toolkit (TTK) in Quartus Prime software version 16.0? com.altera.debug.core SEVERE: TTK failed reading from PHY slave_<slave address>

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Quartus® Prime version 16.0 software, you may see any of the messages below when you start Transceiver ToolKit (TTK) for a non-PCIe® interface but have a PCIe interface in your design. You may also see these messages when you start TTK for a PCIe interface.

    You may also see errors in the System Console tree as shown in this screenshot .

    This is due to missing clock connections for the Hard IP for PCI Express® IP core's Transceiver Reconfiguration Controller, which impacts the use of TTK for other interfaces. 

    com.altera.debug.core
    SEVERE: TTK failed reading from PHY slave_, cannot enable TTK functionality for this PHY. Please verify the reconfig_clk is running and ensure this PHY is not stuck in reset.

    com.altera.debug.core
    SEVERE: open_service: Could not open service at /devices/)|..@1#USB-1#<....>/master: Channel busy

    error: open_service: Could not open service at /devices/)|..@1#USB-1#<...>/master: Channel busy
        while executing
    "open_service master $"
        (procedure "" line 6)
        invoked from within
    ""
        (file "" line )
        invoked from within
    ""

    Resolution

    To work around this issue, edit the instantiation of the Hard IP for PCI Express® core and add the PCIe reference clock to the Transceiver Reconfiguration Controller connections as shown below. Replace <refclk_clk> below with the actual PCIe refclk signal used in your design.

    FROM:

    .xcvr_reconfig_clk              (1'b0),
    ...
    .reconfig_pll0_clk              (1'b0),
    ...
    .reconfig_pll1_clk              (1'b0),

    TO:

    .xcvr_reconfig_clk              (<refclk_clk>),
    ...
    .reconfig_pll0_clk              (<refclk_clk>),
    ...
    .reconfig_pll1_clk              (<refclk_clk>),

    This problem is scheduled to be fixed in a future version of the Quartus® Prime software.

    Related Products

    This article applies to 1 products

    Intel® Programmable Devices