Description
For an n-bit state machine, 2n possible states exist. AHDL state machines that contain explicitly declared state bits often do not have every state defined in their state map. These undefined states are illegal states. A design that enters an illegal state--for example, as a result of timing violations--can cause erroneous outputs. Although Altera® recommends that state machine inputs meet all setup and hold time requirements, you can make a state machine recover from an illegal state in AHDL by forcing the illegal state to a known state by using the
WHEN OTHERS keywords.
To recover from illegal states in AHDL designs that do not use one-hot state machine encoding, you must name all illegal states in the state machine. The WHEN OTHERS keywords in the Case Statement applies only to states that have been defined in the state machine declaration. If you declare n bits in a state machine, you should continue to add dummy state names until the number of states reaches 2n.
The example below contains a state machine that can recover from illegal states:
SUBDESIGN recover
(
clk : INPUT;
go : INPUT;
ok : OUTPUT;
)
VARIABLE
sequence : MACHINE
OF BITS (q[2..0])
WITH STATES (
idle,
one,
two,
three,
four,
illegal1,
illegal2,
illegal3);
BEGIN
sequence.clk = clk;
CASE sequence IS
WHEN idle =>
IF go THEN
sequence = one;
END IF;
WHEN one =>
sequence = two;
WHEN two =>
sequence = three;
WHEN three =>
sequence = four;
WHEN OTHERS =>
sequence = idle;
END CASE;
ok = (sequence == four);
END;
The WHEN OTHERS keywords cannot be used to recover from illegal states that use one-hot encoding.
To design a one-hot state machine that can recover from illegal states, use registers and combinatorial logic. Do not design it as an AHDL state machine.