Article ID: 000076477 Content Type: Troubleshooting Last Reviewed: 10/22/2013

What is the recommended termination guideline for mem_reset_n when using DDR3 SDRAM controller with UniPHY?

Environment

    Quartus® II Subscription Edition
    Memory Interfaces with UniPHY
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Description

Altera® does not recommend terminating the mem_reset_n signal. DDR3 DIMMs typically do not use any termination on the memory reset signal. Refer to the memory vendor datasheet for any memory reset termination guidelines.

Resolution

 

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This article applies to 4 products

Arria® V FPGAs and SoC FPGAs
Stratix® IV FPGAs
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Stratix® III FPGAs

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