Article ID: 000076466 Content Type: Product Information & Documentation Last Reviewed: 03/12/2013

How do I disable the transceiver On-Chip-Termination (OCT) of the Stratix IV GT, 10GBase-R PHY IP?

Environment

  • Stratix® IV GT FPGA
  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    You can disable the transceiver On-Chip-Termination (OCT) of the Stratix® IV GT, 10GBase-R PHY IP by following the steps below.

    1. Open the MegaWizard generated siv_xcvr_low_latency_phy_nr.sv file.
    2. Search for the tx_use_external_termination" and "rx_use_external_termination" parameters and change the setting from FALSE to TRUE.
    3. Recompile your Quartus® II project and verify the transceiver pin termination in the fitter report.

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