Article ID: 000076440 Content Type: Troubleshooting Last Reviewed: 06/18/2025

Is there any known issue with Stratix® 10 FPGA Configuration via Protocol (CvP) operation in Quartus® Prime Pro Edition Software version 18.1?

Environment

    Intel® Quartus® Prime Pro Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

You may encounter the following failure when trying to perform the Configuration via Protocol (CvP) operation in Quartus® Prime Pro Edition Software version 18.1:

  • When you perform any Configuration via Protocol operation, there is a small chance that the operation will halt. This issue impacts all Stratix® 10 FPGA production devices. 
  • During the Configuration via Protocol (CvP) process, if the bitstream is corrupted after the first 168kB of data, the CVP_CONFIG_ERROR bit in the CvP Status Register goes high. This will cause the Stratix® 10 FPGA device to hang, and another Configuration cannot recover it via a Protocol (CvP) update. This issue impacts all Stratix® FPGA 10 production devices. 

 

Resolution

Power cycle the Stratix® FPGA device to perform the next Configuration via Protocol (CvP) operation.

Related Products

This article applies to 1 products

Intel® Stratix® 10 FPGAs and SoC FPGAs

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