Article ID: 000076318 Content Type: Troubleshooting Last Reviewed: 07/17/2017

Why does my Frame Buffer II drop every other output sample?

Environment

    Intel® Quartus® Prime Pro Edition
    Frame Buffer II (4K Ready) Intel® FPGA IP
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a problem with the Frame Buffer II IP Core prior to Quartus® Prime Software version 17.0, you will see this behavior if you select the 128 bit Avalon®-MM master(s) local ports width.

Resolution

To work around this problem, select the 256 bit local ports width.  Qsys® will automatically insert a width adapter if you need to connect to other 128 bit slaves.

This problem has been fixed starting in the Quartus Prime software version 17.0.

Related Products

This article applies to 9 products

Arria® V FPGAs and SoC FPGAs
Intel® Arria® 10 FPGAs and SoC FPGAs
Intel® MAX® 10 FPGAs
Arria® II FPGAs
Cyclone® IV FPGAs
Cyclone® V FPGAs and SoC FPGAs
Stratix® IV FPGAs
Stratix® V FPGAs
Intel® Cyclone® 10 FPGAs

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