Article ID: 000075678 Content Type: Error Messages Last Reviewed: 08/03/2023

Error (175006): Could not find path between source global or regional clock driver and the HMC


  • Intel® Quartus® Prime Design Software

    You may see the above error when using the DDR3 Hard Memory Controller in a Cyclone® V device if the number of MPFE ports selected in the DDR3 IP GUI exceeds the number of ports supported by the device. IP Generation only considers the device family being used and not the specific device. 

    Refer to the External Memory Interfaces in Cyclone V Devices chapter of the Cyclone® V Handbook to determine the number of MPFE Ports Per Device.


    To fix this error, change the number of MPFE ports to a value that does not exceed the maximum number of ports supported for the device.

    Related Products

    This article applies to 12 products

    Arria® V GX FPGA
    Arria® V GT FPGA
    Cyclone® V FPGAs and SoC FPGAs
    Cyclone® V E FPGA
    Arria® V ST SoC FPGA
    Cyclone® V SX SoC FPGA
    Cyclone® V GT FPGA
    Cyclone® V GX FPGA
    Arria® V GZ FPGA
    Arria® V SX SoC FPGA
    Cyclone® V ST SoC FPGA
    Cyclone® V SE SoC FPGA