Article ID: 000075493 Content Type: Troubleshooting Last Reviewed: 07/14/2021

Why does the Intel® FPGA F-Tile Avalon® Streaming for PCI Express* link not re-enumerate?

Environment

  • Intel® Agilex™ F-Series FPGAs and SoC FPGAs
  • Intel® Agilex™ I-Series FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition
  • PCI Express
  • Avalon-ST Intel® Stratix® 10 Hard IP for PCI Express
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    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition software version 21.2, after an interruption to the PCI Express* reference clock supply of the Intel® FPGA F-Tile Avalon® Streaming for PCI Express* IP in user mode, the link is not able to re-enumurate by rebooting the host.

     

    Resolution

    To work around this problem, reconfigure the FPGA. 

    This problem is scheduled to be fixed in future release of the Intel® Quartus® Prime Pro Edition software.

     

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