Article ID: 000075377 Content Type: Troubleshooting Last Reviewed: 05/10/2018

Why does the Intel® Stratix® 10 Low Latency 10G Ethernet MAC Example Designs fail to simulate when using NCSim or Xcelium?

Environment

  • Intel® Stratix® 10 GX FPGA
  • Intel® Stratix® 10 SX SoC FPGA
  • Intel® Stratix® 10 FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition
  • Low Latency Ethernet 10G MAC Intel® FPGA IP
  • 10GBASE-R PHY Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    The Intel® Stratix® 10 Low Latency 10G Ethernet MAC Example Designs will fail to simulate correctly in either NCSim or Xcelium for the configurations below:

    10G Base-R

    1/2.5/10G with 1588

    10M/100M/1G/2.5G/10G

    Resolution

    No work around for NCSim or Xcelium is available.

    Please use VCS or ModelSim to simulate this IP core with software version v17.1 or v18.0

    The simulation problem when using NCSim or Xcelium is scheduled to be fixed in a future version of Intel Quartus® Prime Pro software.

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