Article ID: 000075216 Content Type: Troubleshooting Last Reviewed: 09/03/2012

Why is the rx_freqlocked signal stuck in deasserted state after Cyclone IV GX transceiver PLL reconfiguration? What are the correct steps for Cyclone IV GX transceiver PLL reconfiguration?

Environment

  • Cyclone® IV GX FPGA
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Rx_freqlocked signal may get stuck in deasserted (low) state, after Cyclone® IV GX transceiver PLL dynamic reconfiguration, even though the tx_clkout and rx_clkout have changed to correct frequency. Resetting transceivers or MPLL does not solve the issue.

You may see this issue, when you try to reconfigure one MPLL configuration to another with a different M counter value. For example, you may see this issue, if the static MPLL parameters setting has M counter value of 5 and you reconfigure the MPLL with a M counter setting of 25. This issue is not seen if both the static MPLL and reconfigured MPLL parameters setting have the same M counter value.

Due to a software bug, one of the input signals to the PPM detector is not being updated correctly after the PLL Reconfiguration. This issue can be corrected by performing Channel Reconfiguration after the PLL Reconfiguration to update the PPM detector input signals.  Take the following steps to workaround this issue.
 
1. During transceiver PLL reconfiguration, hold transceiver in reset by asserting tx_digitalreset, rx_digitalreset and rx_analogreset signals.
2. Perform PLL Reconfiguration to update MPLL with PLL MIF files.
3. Perform Channel Reconfiguration and update the transceiver with GXB Reconfig MIF files. If you have multiple channel instantiations connected to the same MPLL, perform channel reconfiguration on each channel.
4. De-assert tx_digitalreset and rx_analogreset.
5. Upon rx_freqlocked assertion (high), wait for at least 4us period, then de-assert rx_digitalreset.

Notes:
For Quartus II 11.0: You can use the software directly and implement this solution (PLL reconfiguration followed channel reconfiguration).
For Quartus II 10.1SP1: Before implementing this solution, install patch 1.03, re-generate the ALTGX_RECONFIG component file and recompile to generate the GXB MIF file.
For Quartus II 10.1: Before implementing this solution, install patch 0.36, re-generate the ALTGX_RECONFIG component file and recompile to generate the GXB MIF file.
For earlier Quartus II versions: please move your design to 11.0, re-generate the ALTGX_RECONFIG component file, recompile to generate the GXB MIF file, implement the steps provided in this solution.

rd04282011_792_fig

Patch 1.03 for Quartus II software version 10.1SP1

Patch 0.36 for Quartus II software version 10.1

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