You are recommended to adjust the PCB trace between the LVDS channels when interfacing with non-DPA receivers and data rates operating above 840Mbps in Arria® II GX devices. This is required in Quartus® II v9.1 and later versions. You should adjust the PCB trace with the recommendation from the Quartus II software to ensure the channel-to-channel skew (TCCS) and sampling window (SW) specifications as stated in the Arria II GX Devices Data Sheet (PDF) are met.
Use the recommended trace delay addition as reported in the Quartus II software to manually adjust the PCB trace. This information can be obtained from the Compilation Report - Fitter - Resource Section - LVDS Transmitter/Receiver Package Skew Compensation panel. The report panel also shows the total estimated TCCS and SW reductions value that can be saved after performing the PCB trace compensation. This is shown under the Estimated TCCS/SW Reduction column.
You may refer to High-Speed Differential I/O Interfaces and DPA in Arria II GX Devices (PDF) and ALTLVDS Megafunction User Guide (PDF) for more information.
For the Quartus II 9.1 software, the Estimated TCCS/SW Reduction Column reports incorrect information. This will be fixed in a future version of the Quartus II software. Refer to the Quartus II Software Release Notes.