Does the output hold time (tCLQX) of the quad-serial configuration (EPCQ) device meet the data hold time after the falling edge on DCLK (tDH) requirement for active serial (AS) configuration in Arria® V, Stratix® V, and Cyclone® V device?
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FPGA |
Assessment Results |
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Arria® V GX/GT/SX/ST |
Yes. The EPCQ devices datasheet doesn't show the tCLQX specifications. But the Arria V GX/GT/SX/ST characterization data shows the minimum tCLQX of EPCQ device is the same as or larger than the minimum tDH requirement for AS configuration shown in the Arria® V device datasheet. |
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Arria® V GZ device |
Please contact your local Field Applications Engineer (FAE) or submit a Service Request at the My Intel support page. |
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Stratix® V GT/GX/GS/E |
Please contact your local FAE or submit a Service Request at the My Intel support page. |
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Cyclone® V device |
Refer to the following knowledge article: |