Article ID: 000074938 Content Type: Error Messages Last Reviewed: 10/18/2021

Error: LVDS SDC cannot find IOPLL. Ensure IOPLL SDC is listed before LVDS SDC in qsf.

Environment

  • Intel® Stratix® 10 FPGAs and SoC FPGAs
  • Intel® Quartus® Prime Pro Edition
  • LVDS SERDES Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    In the Intel® Quartus® Prime Pro Edition Software version 19.1, this error message may be seen in designs that target Intel Stratix® 10 devices that include one or more instances of the LVDS SERDES Intel FPGA IP. This error may be reported while Fitter or Timing Analyzer stages are being executed.

    Resolution

    To work around this problem, make sure that the IOPLL Intel FPGA IP is listed before the LVDS SERDES Intel FPGA IP in the 'IP Components' tab on the Intel Quartus Project Navigator. Alternatively, you can go to Assignments > Settings… , then choose 'Timing Analyzer' category and re-arrange the order of the IP files.

    Once the order of the IP files is correct, proceed to install the following patch for your operating system:

    This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 19.2.

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