Article ID: 000074691 Content Type: Troubleshooting Last Reviewed: 12/27/2022

Why do I observe some I/O pins being driven to LOW (GND) during the POF file programming for Intel® MAX® 10 devices?


  • Intel® Quartus® Prime Pro Edition

    During the Intel® MAX® 10 device .pof file programming, the Intel® Quartus® Prime Software programmer will first configure the Intel MAX 10 FPGA CRAM with a pre-compiled .sof image to assist data transfer during flash programming. This pre-compile .sof image helps to improve overall .pof file programming time. The Intel MAX 10 device is in user mode during the .pof file programming and all the I/O pins states and settings are determined by the pre-compile .sof image. However the pre-compile .sof image for some Intel MAX 10 devices have incompatible I/O pins settings compare to actual hardware package pinout. Hence causing some of the Intel MAX 10 devices I/O pins to be inadvertently driven to GND during the .pof file programming. The correct I/O pins states should be tri-stated during the .pof file programming for Intel MAX 10 devices.  

    The affected Intel MAX 10 devices are as follow when using the Intel Quartus Prime Software programmer prior to version 17.0:

    • All 10M40D*F672, 10M08D*U324, 10M08S*E144, 10M04D*U324, 10M04S*U169, 10M04S*E144, 10M02S*U169 and 10M02S*E144 devices.

    This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 17.0.

    Related Products

    This article applies to 1 products

    Intel® MAX® 10 FPGAs