Description
You might see this error message in the Intel® Quartus® Prime Software when you are using the ALTIOBUF Intel® FPGA IP with the following settings:
- Module: As an output buffer.
- Configuration: Use differential mode
- Dynamic Delay Chains: Enable output buffer dynamic delay chain1
Resolution
To work around this problem, add the following command to the.qsf file:
set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to <node_name>_component|sd1