Article ID: 000074116 Content Type: Troubleshooting Last Reviewed: 02/05/2013

Why is the phase shift resolution for the ALTPLL megafunction in RTL simulation different than the expected value?

Environment

    Quartus® II Subscription Edition
    Simulation
    PLL
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

When performing RTL simulation of the ALTPLL megafuction, the phase shift step resolution may be different than the expected value when the PLL type is set to "AUTO" by turning on the Select the PLL type automatically option in the ALTPLL MegaWizard® Plug-In Manager. In this case, the simulation model may choose a different VCO frequency than the ALTPLL megafunction, and the phase-step is incorrect.

This problem does not effect gate-level simulation using the ALTPLL megafunction.

The correct phase shift step resolution can be determined by calculation. Please refer to:  Phase-Locked Loop (ALTPLL) Megafunction User Guide (PDF), in the Dynamic Phase Reconfiguration Chapter. From this User Guide, the finest phase shift step is 1/8th of the PLL's VCO frequency.

Resolution To work around this problem, turn on the Create output file(s) using \'Advanced\' PLL parameters option on the Inputs/Lock page of the ALTPLL MegaWizard Plug-In Manager.

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