Article ID: 000073659 Content Type: Product Information & Documentation Last Reviewed: 03/12/2013

How do I disable or bypass the output register of DSP block on Cyclone V, Arria V and Stratix V devices by using ALTMULT_ADD Megafunction?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

In order to disable or bypass the output register of DSP block on Cyclone® V, Arria® V and Stratix® V devices, you have to uncheck both "Add extra register(s) at the output" and "Register Output of the multiplier" parameters in ALTMULT_ADD Megafunction.

Related Products

This article applies to 16 products

Cyclone® V SX SoC FPGA
Stratix® V FPGAs
Stratix® V GX FPGA
Cyclone® V GX FPGA
Stratix® V GT FPGA
Stratix® V GS FPGA
Arria® V GZ FPGA
Arria® V SX SoC FPGA
Cyclone® V ST SoC FPGA
Arria® V ST SoC FPGA
Arria® V GX FPGA
Arria® V FPGAs and SoC FPGAs
Arria® V GT FPGA
Cyclone® V FPGAs and SoC FPGAs
Stratix® V E FPGA
Cyclone® V SE SoC FPGA