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Is There an Impact or Memory Bandwidth Degradation if Any Core From the Intel® Xeon® Scalable Processors Is Disabled?

Content Type: Product Information & Documentation   |   Article ID: 000055772   |   Last Reviewed: 02/28/2025

Environment

Intel® Xeon® Scalable Processors

Description

If two cores of the Intel® Xeon® Scalable Processor are disabled, will that degrade the memory bandwidth or speed in any way?

Resolution

Memory bandwidth can be affected if any core from the Intel® Xeon® Scalable processors is disabled.

When one logical processor is disabled, the MBA feature may select an incorrect MBA throttling value to apply to the core. This can result in unintended bandwidth throttling, particularly if the disabled logical processor behaves as though its associated IA32_PQR_ASSOC MSR (0xC8F) is set to zero.

This misconfiguration can lead to the MBA throttling value associated with CLOS[0] being incorrectly applied to both threads on the core, potentially reducing the memory bandwidth available to the active threads.

To avoid this issue, it is recommended not to use CLOS[0] if any logical cores are disabled, or to leave all threads enabled.

For more information about the Intel® Xeon® Scalable Processors, visit:

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