Rapid Recompile is an optional step in the Intel® Quartus® Prime software compilation flow where the compiler reuses previous synthesis and fitting results whenever possible, and does not reprocess unchanged design blocks. Use Rapid Recompile to reduce timing variations and the total recompilation time after making small design changes. Rapid Recompile supports HDL-based functional ECO changes and enables you to reduce your compile time while preserving performance of unchanged logic.
In Intel Quartus Prime software v18.0, Intel® Stratix® 10 Rapid Recompile has the following features:
SignalTap* support for Intel® Stratix® 10 Rapid Recompile
Intel® Stratix® 10 Post-fit incremental route SignalTap* support
Please refer to the quick links below for details.
Training resources to help you learn. There are many online video demos, interactive tutorials, online training, instructor-led training, and virtual classrooms to familiarize yourself with the design tool.