Introduction to the Acceleration Stack for Intel® Xeon® CPU with FPGA (OACCELINTRO)
Course Description
The Acceleration Stack for Intel Xeon CPU with FPGAs is a robust collection of software, firmware, and tools intended to make it easier to develop and deploy Intel FPGAs for workload optimization in the data center. In this training, we will discuss an overview of the framework, including how the various layers of the Acceleration Stack work together, the APIs for interacting with the FPGA, and the development flows for creating an Accelerator Function Unit for the FPGA.At Course Completion
You will be able to:
- Understand high-level concepts of the Acceleration Stack for Intel Xeon CPU with FPGAs
- Describe the layers in the Acceleration Stack
- Know the basics of the FPGA drivers and the Open Programmable Acceleration Engine (OPAE)
- Understand the development flows for the Acceleration Stack
- Know the capabilities of the Intel Programmable Acceleration Card
Skills Required
- Basic understanding of FPGAs
Follow-on Courses
Upon completing this course, we recommend the following courses (in no particular order):
Applicable Training Curriculum
This course is part of the following Intel FPGA training curriculum: