Critical Issue
Description
When the parts per million (PPM) frequency difference between
the PCS receive clock and the external PHY transmit clock is not
zero, the GMII receive interface will receive and extra preamble
(0x55) on the gmii_rx_d
data bus.
This issue affects all designs that contain GXB transceiver block.
Resolution
This issue has no workaround.This issue is fixed in version 11.1 SP1 of the Triple-Speed Ethernet MegaCore function.