Article ID: 000075839 Content Type: Troubleshooting Last Reviewed: 04/03/2023

Why do I get an error when selecting a rank of 4 with 4 chip selects for a DDR3 LRDIMM?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    For Stratix® V FPGA DDR3 memory controllers, when selecting the LRDIMM memory format with the "Number of ranks per slot" set to 4 and the "Number of chip selects per device/DIMM" set to 4, you will see the following error:

    Error: LRDIMM: can't read "cfg_write_ddr3_lrdimm_table(44)": no such element in array
        while executing
    "set generated_cfg_odt_chip  ()"
        ("if" then script line 2)
        invoked from within
    "if {} {
                            set generated_cfg_odt_chip  ()
                    } else {
                      ..."
        ("if" then script line 2)
        invoked from within
    "if {[regexp {^DDR2$} ] == 1 && ([array names cfg_write_ddr2_table ] != "") && } {
                    set generated_cfg_odt_chip $..."
        (procedure "_compute_odt_chip" line 63)
        invoked from within
    "_compute_odt_chip 1"
        invoked from within
    "set_parameter_value CFG_WRITE_ODT_CHIP [_compute_odt_chip 1]"
        ("if" then script line 125)
        invoked from within
    "if {[string compare -nocase [get_parameter_value NEXTGEN] "true"] == 0} {

            if {[regexp {^DDR1$} ] == 1} {
                set_parameter_value CFG_TYPE 0..."
        (procedure "_derive_parameters" line 209)
        invoked from within
    "_derive_parameters"
        (procedure "alt_mem_if::gui::ddrx_controller::validate_component" line 5)
        invoked from within
    "alt_mem_if::gui::ddrx_controller::validate_component"
        (procedure "ip_validate" line 11)
        invoked from within
    "ip_validate"

    The error occurs because a quad-rank (rank of 4) LRDIMM does not use 4 chip selects.

    Resolution

    The workaround is to select a quad-rank LRDIMM preset in the Preset Editor of the parameter editor. The preset will specify the correct number of address and chip select signals.

    This problem is fixed starting with the Quartus® II software version 14.0.

    Related Products

    This article applies to 4 products

    Stratix® V GT FPGA
    Stratix® V GX FPGA
    Stratix® V E FPGA
    Stratix® V GS FPGA