Device Family: Arria® V, Stratix® III, Stratix® IV, Stratix® V

Type: Answers

Area: EMIF

Last Modified: October 22, 2013
Version Found: v13.0
IP Product: DDR3 SDRAM Controller MegaCore supporting UniPHY
Bug ID: N/A
IP: memory-interfaces-with-uniphy

What is the recommended termination guideline for mem_reset_n when using DDR3 SDRAM controller with UniPHY?


Altera® does not recommend terminating the mem_reset_n signal. DDR3 DIMMs typically do not use any termination on the memory reset signal. Refer to the memory vendor datasheet for any memory reset termination guidelines.