Article ID: 000080675 Content Type: Troubleshooting Last Reviewed: 05/23/2019

Why does simulation of the Intel® FPGA Triple-Speed Ethernet IP core fail in Mentor* ModelSim designs targeting Intel® Arria® 10 and Intel® Cyclone® 10 GX devices?

Environment

  • Intel® Quartus® Prime Pro Edition
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Due to a problem with the Intel® FPGA Triple-Speed Ethernet IP designs targeting the Intel® Arria® 10 and Intel® Cyclone® 10 GX devices may fail simulation when using the Mentor* Modelsim simulator in the Intel® Quartus® Prime Pro software version 19.1.

    Resolution

    To work around this problem, turn off optimization in the simulator by replace the "-voptargs= acc" flag in simulation script msim_setup.tcl with "-novopt" flag.

    This issue has been fixed starting in version 20.3 of the Intel® Quartus® Prime Pro software.

    Related Products

    This article applies to 2 products

    Intel® Cyclone® 10 FPGAs
    Intel® Arria® 10 FPGAs and SoC FPGAs

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