When using the Intel® Stratix® 10 10GBASE-KR PHY IP, the Low Latency Ethernet 10G MAC Intel® Stratix® 10 FPGA IP, the Stratix® 10 Low Latency 40-Gbps Ethernet IP or the L-Tile/H-Tile Transceiver Native PHY Intel Stratix 10 FPGA IP in 10G or 40G KR modes, the hard PCS can get stuck sending out PRBS pattern if a csr reset comes in during reconfiguration to data mode.
Device Family: Intel® Stratix® 10
Type: Answers, Errata
Area: Intellectual Property
Last Modified: November 09, 2018
Version Found: v18.1
Bug ID: FB: 591234;
Why does the Intel® Stratix® 10 10GBASE-KR and 40GBASE-KR Hard PCS get stuck sending out a PRBS pattern?
Description
Workaround/Fix
To work around this problem, use Auto-Negotiation(AN) or Link Training(LT) reconfiguration to clear this state.
This problem will be fixed in a future release of the Intel® Quartus® Prime software.