Retraining an Intel® Arria® 10 Gen3 PCIe* Root Port link with Perform Equalization bit (Link Control 3 register 0x304 bit) and Retrain Link bit (Link Control and Status register 0x90 bit) set to 1 may cause the Gen3 link to down train to Gen1 speed. Unlike the Retrain Link bit, the Perform Equalization bit does not get cleared automatically after it is set to 1 , causing the LTSSM to continuously enter the Equalization state and time out.
Device Family: Intel® Arria® 10, Intel® Arria® 10 GT, Intel® Arria® 10 GX, Intel® Arria® 10 SX
Type: Answers, Errata
Area: Intellectual Property
Last Modified: August 14, 2018
Version Found: v17.1 Update 1
Bug ID: FB: 546097;
IP: Arria 10 Hard IP for PCI Express