The AER function is enabled by default for all Intel® Stratix® 10 PCIe* Hard IP cores. The user cannot disable this function.
Device Family: Intel® Stratix® 10
Type: Answers
Area: Intellectual Property
Last Modified: February 26, 2018
Version Found: v17.1
Bug ID: FB: 538154;
IP: Avalon-ST Stratix 10 Hard IP for PCI Express, Avalon-MM Stratix 10 Hard IP for PCI Express
How do I enable or disable the Advanced Error Detection (AER) for my PCIe* Hard IP core?
Description
Workaround/Fix
No work around is required.