In the Intel® Quartus® Prime Pro software version 18.0, the Quartus Prime Programmer tool may crash when attempting to perform JIC file programming, if the Intel Stratix® 10 SoC device is already configured with the combined FPGA and HPS JTAG option. This is because the FPGA is initially the second device in the JTAG chain (after the HPS) - however once the SFL helper image is programmed, the HPS is removed and the FPGA is now the first device in the JTAG chain.
The discrepancy in JTAG device numbering causes the Quartus Programmer tool to crash as it is expecting the FPGA device to remain at the same location in the JTAG chain during the entire process.
This issue does not impact you if:
- The Intel® Stratix® 10 SoC device remains unconfigured before the start of JIC file programming
- The Intel Stratix 10 SoC HPS JTAG is using the HPS dedicated I/O pins and does not share the same JTAG chain with FPGA.