|
add_to_collection
|
sta |
1.0 |
|
adjust_pll_refclk
|
eco |
1.0 |
|
all_clocks
|
sdc |
1.5 |
|
all_inputs
|
sdc |
1.5 |
|
all_outputs
|
sdc |
1.5 |
|
all_registers
|
sdc |
1.5 |
|
analyze_files
|
interactive_synthesis |
1.0 |
|
apply_setting
|
external_memif_toolkit |
1.0 |
|
assignment_group
|
project |
6.0 |
|
begin_logic_analyzer_interface_control
|
logic_analyzer_interface |
1.0 |
|
begin_memory_edit
|
insystem_memory_edit |
1.0 |
|
blueprint__initialize
|
periph |
1.0 |
|
blueprint__shutdown
|
periph |
1.0 |
|
bpps__apply_assignments
|
bpps |
1.0 |
|
bpps__check_plan
|
bpps |
1.0 |
|
bpps__export_constraints_to_qsf
|
bpps |
1.0 |
|
bpps__get_cell_info
|
bpps |
1.0 |
|
bpps__get_device
|
bpps |
1.0 |
|
bpps__get_hdbpath_from_id
|
bpps |
1.0 |
|
bpps__get_id_from_hdbpath
|
bpps |
1.0 |
|
bpps__get_location_info
|
bpps |
1.0 |
|
bpps__get_placement
|
bpps |
1.0 |
|
bpps__get_placement_info
|
bpps |
1.0 |
|
bpps__get_placements
|
bpps |
1.0 |
|
bpps__get_placements_of_group
|
bpps |
1.0 |
|
bpps__harden_cell
|
bpps |
1.0 |
|
bpps__harden_cells
|
bpps |
1.0 |
|
bpps__initialize
|
bpps |
1.0 |
|
bpps__load_floorplan
|
bpps |
1.0 |
|
bpps__place_cells
|
bpps |
1.0 |
|
bpps__read_tpl_placement
|
bpps |
1.0 |
|
bpps__remove_invalid_reports
|
bpps |
1.0 |
|
bpps__report_all
|
bpps |
1.0 |
|
bpps__report_cell_connectivity
|
bpps |
1.0 |
|
bpps__report_cell_placement_reasons
|
bpps |
1.0 |
|
bpps__report_cells
|
bpps |
1.0 |
|
bpps__report_clocks
|
bpps |
1.0 |
|
bpps__report_legal_cell_locations
|
bpps |
1.0 |
|
bpps__report_location_types
|
bpps |
1.0 |
|
bpps__report_locations
|
bpps |
1.0 |
|
bpps__report_regions
|
bpps |
1.0 |
|
bpps__report_summary
|
bpps |
1.0 |
|
bpps__reset_plan
|
bpps |
1.0 |
|
bpps__save_floorplan
|
bpps |
1.0 |
|
bpps__save_pin_assignments
|
bpps |
1.0 |
|
bpps__select_dr_ips
|
bpps |
1.0 |
|
bpps__set_mode
|
bpps |
1.0 |
|
bpps__shutdown
|
bpps |
1.0 |
|
bpps__soften_cell
|
bpps |
1.0 |
|
bpps__soften_cells
|
bpps |
1.0 |
|
bpps__undo_last_placement
|
bpps |
1.0 |
|
bpps__unplace_cells
|
bpps |
1.0 |
|
bpps__update_pdpw
|
bpps |
1.0 |
|
bpps__validate_placement
|
bpps |
1.0 |
|
bpps__write_plan
|
bpps |
1.0 |
|
bpps__write_tpl_placement
|
bpps |
1.0 |
|
calibrate_termination
|
external_memif_toolkit |
1.0 |
|
change_bank_to_output_pin
|
logic_analyzer_interface |
1.0 |
|
check
|
fif |
1.0 |
|
check_node
|
chip_planner |
2.0 |
|
check_rtl_connections
|
interactive_synthesis |
1.0 |
|
check_timing
|
sta |
1.0 |
|
checksum
|
misc |
1.0 |
|
clear_ip_generation_dirs
|
ipgen |
1.0 |
|
close_chip_planner
|
chip_planner |
2.0 |
|
close_device
|
jtag |
1.0 |
|
close_session
|
stp |
1.0 |
|
compute_pll
|
iptclgen |
1.0 |
|
configure_driver
|
external_memif_toolkit |
1.0 |
|
create_base_clock
|
project |
5.0 |
|
create_clock
|
sdc |
1.5 |
|
create_connection_report
|
external_memif_toolkit |
1.0 |
|
create_generated_clock
|
sdc |
1.5 |
|
create_relative_clock
|
project |
5.0 |
|
create_report_histogram
|
sta |
1.0 |
|
create_revision
|
project |
7.0 |
|
create_slack_histogram
|
sta |
1.0 |
|
create_timing_netlist
|
sta |
1.0 |
|
create_timing_summary
|
sta |
1.0 |
|
create_toolkit_report
|
external_memif_toolkit |
1.0 |
|
create_wirelut
|
eco |
1.0 |
|
delete_revision
|
project |
7.0 |
|
delete_sta_collection
|
sta |
1.0 |
|
delete_timing_netlist
|
sta |
1.0 |
|
derive_clock_uncertainty
|
sdc_ext |
2.0 |
|
derive_clocks
|
sdc |
1.5 |
|
derive_pll_clocks
|
sdc_ext |
2.0 |
|
design__commit_design
|
design |
1.0 |
|
design__convert_partition
|
design |
1.0 |
|
design__create_assignment
|
design |
1.0 |
|
design__delete_assignments
|
design |
1.0 |
|
design__disable_assignments
|
design |
1.0 |
|
design__enable_assignments
|
design |
1.0 |
|
design__export_design
|
design |
1.0 |
|
design__export_partition
|
design |
1.0 |
|
design__extract_metadata
|
design |
1.0 |
|
design__get_assignment_info
|
design |
1.0 |
|
design__get_assignment_names
|
design |
1.0 |
|
design__get_assignments
|
design |
1.0 |
|
design__get_entity_names
|
design |
1.0 |
|
design__get_instances
|
design |
1.0 |
|
design__import_design
|
design |
1.0 |
|
design__import_partition
|
design |
1.0 |
|
design__list_valid_snapshot_names
|
design |
1.0 |
|
design__load_design
|
design |
1.0 |
|
design__report_assignments
|
design |
1.0 |
|
design__set_assignment_info
|
design |
1.0 |
|
design_has_ace_support
|
chip_planner |
2.0 |
|
design_has_encrypted_ip
|
chip_planner |
2.0 |
|
device_dr_shift
|
jtag |
1.0 |
|
device_ir_shift
|
jtag |
1.0 |
|
device_lock
|
jtag |
1.0 |
|
device_run_test_idle
|
jtag |
1.0 |
|
device_unlock
|
jtag |
1.0 |
|
device_virtual_dr_shift
|
jtag |
1.0 |
|
device_virtual_ir_shift
|
jtag |
1.0 |
|
disable_min_pulse_width
|
sdc_ext |
2.0 |
|
disable_natural_bus_naming
|
misc |
1.0 |
|
dissolve_rtl_partition
|
interactive_synthesis |
1.0 |
|
dms_ver_1.0
|
dcmd_dms |
1.0.xml |
|
dms_ver_1.0_cmd_dni__color
|
dcmd_dms |
1.0 |
|
dms_ver_1.0_cmd_dni__get_property
|
dcmd_dms |
1.0 |
|
dms_ver_1.0_cmd_dni__highlight
|
dcmd_dms |
1.0 |
|
dms_ver_1.0_cmd_dni__is_dni_mode
|
dcmd_dms |
1.0 |
|
dms_ver_1.0_cmd_dni__list_properties
|
dcmd_dms |
1.0 |
|
dms_ver_1.0_cmd_dni__load_design
|
dcmd_dms |
1.0 |
|
dms_ver_1.0_cmd_dni__selection
|
dcmd_dms |
1.0 |
|
dms_ver_1.0_cmd_dni__set_property
|
dcmd_dms |
1.0 |
|
dms_ver_1.0_cmd_dni__unload_design
|
dcmd_dms |
1.0 |
|
dni_gui__trigger_gui
|
dni_gui |
1.0 |
|
drc__add_check_op
|
drc |
1.0 |
|
drc__add_check_parameter
|
drc |
1.0 |
|
drc__add_object
|
drc |
1.0 |
|
drc__add_object_with_properties
|
drc |
1.0 |
|
drc__add_property
|
drc |
1.0 |
|
drc__add_rule
|
drc |
1.0 |
|
drc__add_rule_violation
|
drc |
1.0 |
|
drc__add_violation_record
|
drc |
1.0 |
|
drc__check_design
|
drc |
1.0 |
|
drc__delete_waivers
|
drc |
1.0 |
|
drc__get_objects
|
drc |
1.0 |
|
drc__get_option
|
drc |
1.0 |
|
drc__get_property
|
drc |
1.0 |
|
drc__get_stage_info
|
drc |
1.0 |
|
drc__get_waivers
|
drc |
1.0 |
|
drc__list_properties
|
drc |
1.0 |
|
drc__report_waivers
|
drc |
1.0 |
|
drc__set_option
|
drc |
1.0 |
|
drc__set_property
|
drc |
1.0 |
|
drc__should_run_drc
|
drc |
1.0 |
|
drc__update_check_op
|
drc |
1.0 |
|
drc__update_rule
|
drc |
1.0 |
|
driver_margining
|
external_memif_toolkit |
1.0 |
|
dsld__insert_auto_fabric
|
dsld |
1.0 |
|
dump
|
fif |
1.0 |
|
dump_cram_frame
|
fif |
1.0 |
|
dump_mem
|
fif |
1.0 |
|
dump_pr_bitstream
|
fif |
1.0 |
|
eco__report_partitions
|
eco |
1.0 |
|
eco_reroute
|
eco |
1.0 |
|
eco_unload_design
|
eco |
1.0 |
|
elaborate
|
interactive_synthesis |
1.0 |
|
enable_ccpp_removal
|
sta |
1.0 |
|
enable_natural_bus_naming
|
misc |
1.0 |
|
enable_sdc_extension_collections
|
sta |
1.0 |
|
end_insystem_source_probe
|
insystem_source_probe |
1.0 |
|
end_logic_analyzer_interface_control
|
logic_analyzer_interface |
1.0 |
|
end_memory_edit
|
insystem_memory_edit |
1.0 |
|
escape_brackets
|
misc |
1.0 |
|
establish_connection
|
external_memif_toolkit |
1.0 |
|
execute_assignment_batch
|
project |
7.0 |
|
export_assignments
|
project |
7.0 |
|
export_data_log
|
stp |
1.0 |
|
fitter_report_timing
|
eco |
1.0 |
|
fitter_timing_summary
|
eco |
1.0 |
|
flng__add_object
|
flng |
1.0 |
|
flng__add_property
|
flng |
1.0 |
|
flng__bind_flow
|
flng |
1.0 |
|
flng__delete_object
|
flng |
1.0 |
|
flng__get_flow_list
|
flng |
1.0 |
|
flng__get_next_available_id
|
flng |
1.0 |
|
flng__get_object
|
flng |
1.0 |
|
flng__get_objects
|
flng |
1.0 |
|
flng__get_option
|
flng |
1.0 |
|
flng__get_property
|
flng |
1.0 |
|
flng__get_task_command
|
flng |
1.0 |
|
flng__init_repository
|
flng |
1.0 |
|
flng__list_properties
|
flng |
1.0 |
|
flng__monitor_flow
|
flng |
1.0 |
|
flng__run_flow
|
flng |
1.0 |
|
flng__set_option
|
flng |
1.0 |
|
flng__set_property
|
flng |
1.0 |
|
foreach_in_collection
|
misc |
1.0 |
|
generate
|
fif |
1.0 |
|
generate_eye_diagram
|
external_memif_toolkit |
1.0 |
|
generate_ip_file
|
ipgen |
1.0 |
|
generate_project_ip_files
|
ipgen |
1.0 |
|
generate_vhdl_simgen_model
|
iptclgen |
1.0 |
|
get_active_clocks
|
sdc_ext |
2.0 |
|
get_all_assignments
|
project |
7.0 |
|
get_all_global_assignments
|
project |
7.0 |
|
get_all_instance_assignments
|
project |
7.0 |
|
get_all_parameters
|
project |
7.0 |
|
get_all_quartus_defaults
|
project |
7.0 |
|
get_all_user_option_names
|
project |
7.0 |
|
get_assignment
|
names |
1.0 |
|
get_assignment_groups
|
sdc_ext |
1.0 |
|
get_assignment_info
|
project |
7.0 |
|
get_assignment_name_info
|
project |
7.0 |
|
get_available_operating_conditions
|
sta |
1.0 |
|
get_available_snapshots
|
eco |
1.0 |
|
get_back_annotation_assignments
|
backannotate |
1.1 |
|
get_cell_info
|
sta |
1.0 |
|
get_cells
|
sdc |
1.5 |
|
get_clock_domain_info
|
sta |
1.0 |
|
get_clock_fmax_info
|
sta |
1.0 |
|
get_clock_info
|
sta |
1.0 |
|
get_clock_pair_info
|
sta |
1.0 |
|
get_clocks
|
sdc |
1.5 |
|
get_collection_size
|
misc |
1.0 |
|
get_connection_commands
|
external_memif_toolkit |
1.0 |
|
get_connection_info
|
external_memif_toolkit |
1.0 |
|
get_connection_interfaces
|
external_memif_toolkit |
1.0 |
|
get_connection_report_info
|
external_memif_toolkit |
1.0 |
|
get_connection_report_types
|
external_memif_toolkit |
1.0 |
|
get_connection_types
|
external_memif_toolkit |
1.0 |
|
get_connections
|
external_memif_toolkit |
1.0 |
|
get_current_project
|
project |
7.0 |
|
get_current_revision
|
project |
7.0 |
|
get_current_state_of_output_pin
|
logic_analyzer_interface |
1.0 |
|
get_database_version
|
project |
7.0 |
|
get_datasheet
|
sta |
1.0 |
|
get_default_sdc_file_names
|
sta |
1.0 |
|
get_device_names
|
jtag |
1.0 |
|
get_eco_checkpoint
|
eco |
1.0 |
|
get_edge_info
|
sta |
1.0 |
|
get_editable_mem_instances
|
insystem_memory_edit |
1.0 |
|
get_entities
|
interactive_synthesis |
1.0 |
|
get_entity_instances
|
sta |
1.0 |
|
get_environment_info
|
misc |
1.0 |
|
get_family_list
|
device |
1.0 |
|
get_fanins
|
sdc_ext |
2.0 |
|
get_fanouts
|
sdc_ext |
2.0 |
|
get_fitter_resource_usage
|
report |
2.1 |
|
get_flow_templates
|
flow |
1.1 |
|
get_frame_count
|
fif |
1.0 |
|
get_frame_size
|
fif |
1.0 |
|
get_global_assignment
|
project |
7.0 |
|
get_hardware_names
|
jtag |
1.0 |
|
get_info_parameters
|
chip_planner |
2.0 |
|
get_instance_assignment
|
project |
7.0 |
|
get_insystem_source_probe_instance_info
|
insystem_source_probe |
1.0 |
|
get_iports
|
chip_planner |
2.0 |
|
get_keepers
|
sdc_ext |
2.0 |
|
get_loaded_snapshot
|
eco |
1.0 |
|
get_location_assignment
|
project |
7.0 |
|
get_lutmask_equation
|
eco |
1.0 |
|
get_message_count
|
misc |
1.0 |
|
get_min_pulse_width
|
sta |
1.0 |
|
get_net_info
|
sta |
1.0 |
|
get_nets
|
sdc |
1.5 |
|
get_node_by_name
|
chip_planner |
2.0 |
|
get_node_info
|
sta |
1.0 |
|
get_node_location
|
eco |
1.0 |
|
get_nodes
|
sdc_ext |
2.0 |
|
get_object_info
|
sta |
1.0 |
|
get_operating_conditions
|
sta |
1.0 |
|
get_operating_conditions_info
|
sta |
1.0 |
|
get_oports
|
chip_planner |
2.0 |
|
get_parameter
|
project |
7.0 |
|
get_part_info
|
device |
1.0 |
|
get_part_list
|
device |
1.0 |
|
get_partition_info
|
sta |
1.0 |
|
get_partitions
|
sdc_ext |
2.0 |
|
get_path
|
sta |
1.0 |
|
get_path_info
|
sta |
1.0 |
|
get_pin_info
|
sta |
1.0 |
|
get_pins
|
sdc |
1.5 |
|
get_point_info
|
sta |
1.0 |
|
get_port_by_type
|
chip_planner |
2.0 |
|
get_port_info
|
sta |
1.0 |
|
get_ports
|
sdc |
1.5 |
|
get_project_directory
|
project |
7.0 |
|
get_project_ip_files
|
ipgen |
1.0 |
|
get_project_revisions
|
project |
7.0 |
|
get_project_settings
|
project |
1.0 |
|
get_register_info
|
sta |
1.0 |
|
get_registers
|
sdc_ext |
2.0 |
|
get_rtl_partition_name
|
interactive_synthesis |
1.0 |
|
get_rtl_partitions
|
interactive_synthesis |
1.0 |
|
get_sector_information_sdm_based_fpga
|
fif |
1.0 |
|
get_sensitive_location
|
fif |
1.0 |
|
get_sensitive_location_sdm_based_fpga
|
fif |
1.0 |
|
get_setting_types
|
external_memif_toolkit |
1.0 |
|
get_sp_pin_list
|
chip_planner |
2.0 |
|
get_tile_power_setting
|
chip_planner |
2.0 |
|
get_timing_paths
|
sta |
1.0 |
|
get_toolkit_report_types
|
external_memif_toolkit |
1.0 |
|
get_user_option
|
project |
7.0 |
|
help_arg_examples
|
help |
1.0 |
|
import_sdc
|
sta |
1.0 |
|
init_tk
|
misc |
1.0 |
|
initialize_connections
|
external_memif_toolkit |
1.0 |
|
ipdrc__get_device_speed
|
ipdrc |
1.0 |
|
ipdrc__get_ip_hpaths
|
ipdrc |
1.0 |
|
ipdrc__get_ip_name
|
ipdrc |
1.0 |
|
ipdrc__get_ip_pma_modulation
|
ipdrc |
1.0 |
|
ipdrc__get_ip_speed
|
ipdrc |
1.0 |
|
ipdrc__get_ip_type
|
ipdrc |
1.0 |
|
ipdrc__get_ip_xcvr_type
|
ipdrc |
1.0 |
|
ipdrc__set_ip_info
|
ipdrc |
1.0 |
|
is_database_version_compatible
|
project |
7.0 |
|
is_fitter_in_qhd_mode
|
project |
7.0 |
|
is_place
|
tdc |
1.0 |
|
is_plan
|
tdc |
1.0 |
|
is_post_route
|
tdc |
1.0 |
|
is_project_open
|
project |
7.0 |
|
link_project_to_device
|
external_memif_toolkit |
1.0 |
|
link_rtl_design
|
interactive_synthesis |
1.0 |
|
load
|
misc |
1.0 |
|
load_package
|
misc |
1.0 |
|
locate
|
sta |
1.0 |
|
logiclock_back_annotate
|
backannotate |
1.1 |
|
make_connection
|
eco |
1.0 |
|
modify_io_current_strength
|
eco |
1.0 |
|
modify_io_delay_chain
|
eco |
1.0 |
|
modify_io_slew_rate
|
eco |
1.0 |
|
mtf__test
|
qmtf |
1.0 |
|
open_device
|
jtag |
1.0 |
|
open_session
|
stp |
1.0 |
|
parse_hdl
|
iptclgen |
1.0 |
|
parse_tcl
|
iptclgen |
1.0 |
|
periph__check_plan
|
periph |
1.0 |
|
periph__get_cell_info
|
periph |
1.0 |
|
periph__get_cells
|
periph |
1.0 |
|
periph__get_location_info
|
periph |
1.0 |
|
periph__get_placement_info
|
periph |
1.0 |
|
periph__get_placements
|
periph |
1.0 |
|
periph__load_floorplan
|
periph |
1.0 |
|
periph__place_cells
|
periph |
1.0 |
|
periph__remove_invalid_reports
|
periph |
1.0 |
|
periph__report_all
|
periph |
1.0 |
|
periph__report_cell_connectivity
|
periph |
1.0 |
|
periph__report_cell_placement_reasons
|
periph |
1.0 |
|
periph__report_cells
|
periph |
1.0 |
|
periph__report_clocks
|
periph |
1.0 |
|
periph__report_legal_cell_locations
|
periph |
1.0 |
|
periph__report_location_types
|
periph |
1.0 |
|
periph__report_locations
|
periph |
1.0 |
|
periph__report_regions
|
periph |
1.0 |
|
periph__report_summary
|
periph |
1.0 |
|
periph__reset_plan
|
periph |
1.0 |
|
periph__save_floorplan
|
periph |
1.0 |
|
periph__set_clock_type
|
periph |
1.0 |
|
periph__undo_last_placement
|
periph |
1.0 |
|
periph__unplace_cells
|
periph |
1.0 |
|
periph__update_pdpw
|
periph |
1.0 |
|
periph__update_plan
|
periph |
1.0 |
|
periph__write_plan
|
periph |
1.0 |
|
place_node
|
eco |
1.0 |
|
post_message
|
misc |
1.0 |
|
print_ipxact
|
interactive_synthesis |
1.0 |
|
print_total_sdc_processing_time
|
sta |
1.0 |
|
project_archive
|
project |
7.0 |
|
project_clean
|
project |
7.0 |
|
project_close
|
project |
7.0 |
|
project_exists
|
project |
7.0 |
|
project_new
|
project |
7.0 |
|
project_open
|
project |
7.0 |
|
project_restore
|
project |
7.0 |
|
project_settings_exist
|
project |
1.0 |
|
qerror
|
misc |
1.0 |
|
qexec
|
misc |
1.0 |
|
qexit
|
misc |
1.0 |
|
qshm_connect_to_quartus
|
qshm |
1.0 |
|
qshm_disconnect_from_quartus
|
qshm |
1.0 |
|
qshm_dispose_client
|
qshm |
1.0 |
|
qshm_get_hub_key_prefix
|
qshm |
1.0 |
|
qshm_get_parent_hub_key
|
qshm |
1.0 |
|
qshm_obtain_client
|
qshm |
1.0 |
|
qshm_send_request
|
qshm |
1.0 |
|
qshm_send_server_state_query
|
qshm |
1.0 |
|
qshm_set_context
|
qshm |
1.0 |
|
query_collection
|
sta |
1.0 |
|
read_content_from_memory
|
insystem_memory_edit |
1.0 |
|
read_probe_data
|
insystem_source_probe |
1.0 |
|
read_sdc
|
sta |
1.0 |
|
read_setting
|
external_memif_toolkit |
1.0 |
|
read_source_data
|
insystem_source_probe |
1.0 |
|
read_xml_report
|
report |
2.1 |
|
record_tcl_cmd
|
misc |
1.0 |
|
refresh_report_window
|
report |
2.1 |
|
register_delete_timing_netlist_callback
|
sta |
1.0 |
|
reindex_connections
|
external_memif_toolkit |
1.0 |
|
remove_all_global_assignments
|
project |
7.0 |
|
remove_all_instance_assignments
|
project |
7.0 |
|
remove_all_parameters
|
project |
7.0 |
|
remove_annotated_delay
|
sdc_ext |
2.0 |
|
remove_clock
|
sdc_ext |
2.0 |
|
remove_clock_groups
|
sdc |
1.5 |
|
remove_clock_latency
|
sdc |
1.5 |
|
remove_clock_uncertainty
|
sdc |
1.5 |
|
remove_connection
|
eco |
1.0 |
|
remove_disable_timing
|
sdc |
1.5 |
|
remove_from_collection
|
sta |
1.0 |
|
remove_input_delay
|
sdc |
1.5 |
|
remove_node
|
eco |
1.0 |
|
remove_output_delay
|
sdc |
1.5 |
|
report_advanced_io_timing
|
sta |
1.0 |
|
report_asynch_cdc
|
sta |
1.0 |
|
report_bottleneck
|
sta |
1.0 |
|
report_clock_fmax_summary
|
sta |
1.0 |
|
report_clock_network
|
sta |
1.0 |
|
report_clock_transfers
|
sta |
1.0 |
|
report_clocks
|
sta |
1.0 |
|
report_connections
|
eco |
1.0 |
|
report_datasheet
|
sta |
1.0 |
|
report_ddr
|
sta |
1.0 |
|
report_device_info
|
device |
1.0 |
|
report_exceptions
|
sta |
1.0 |
|
report_family_info
|
device |
1.0 |
|
report_ini_usage
|
sta |
1.0 |
|
report_legal_locations
|
eco |
1.0 |
|
report_logic_depth
|
sta |
1.0 |
|
report_max_clock_skew
|
sta |
1.0 |
|
report_max_skew
|
sta |
1.0 |
|
report_metastability
|
sta |
1.0 |
|
report_min_pulse_width
|
sta |
1.0 |
|
report_neighbor_paths
|
sta |
1.0 |
|
report_net_delay
|
sta |
1.0 |
|
report_net_timing
|
sta |
1.0 |
|
report_nodes_at_location
|
eco |
1.0 |
|
report_part_info
|
device |
1.0 |
|
report_partitions
|
sta |
1.0 |
|
report_path
|
sta |
1.0 |
|
report_pipelining_info
|
sta |
1.0 |
|
report_ports
|
eco |
1.0 |
|
report_register_spread
|
sta |
1.0 |
|
report_reset_statistics
|
sta |
1.0 |
|
report_retiming_restrictions
|
sta |
1.0 |
|
report_route_net_of_interest
|
sta |
1.0 |
|
report_routing
|
eco |
1.0 |
|
report_rskm
|
sta |
1.0 |
|
report_rtl_assignments
|
interactive_synthesis |
1.0 |
|
report_rtl_parameters
|
interactive_synthesis |
1.0 |
|
report_rtl_stats
|
interactive_synthesis |
1.0 |
|
report_sdc
|
sta |
1.0 |
|
report_skew
|
sta |
1.0 |
|
report_tccs
|
sta |
1.0 |
|
report_timing
|
sta |
1.0 |
|
report_timing_by_source_files
|
sta |
1.0 |
|
report_timing_tree
|
sta |
1.0 |
|
report_ucp
|
sta |
1.0 |
|
report_unplaced_nodes
|
eco |
1.0 |
|
reset_design
|
sdc |
1.5 |
|
reset_rtl_design
|
interactive_synthesis |
1.0 |
|
reset_tg2
|
external_memif_toolkit |
1.0 |
|
reset_timing_derate
|
sdc_ext |
2.0 |
|
resolve_file_path
|
project |
7.0 |
|
restore_eco_checkpoint
|
eco |
1.0 |
|
revision_exists
|
project |
7.0 |
|
run
|
stp |
1.0 |
|
run_connection_command
|
external_memif_toolkit |
1.0 |
|
run_multiple_end
|
stp |
1.0 |
|
run_multiple_start
|
stp |
1.0 |
|
sasic
|
interactive_synthesis |
1.0 |
|
save_content_from_memory_to_file
|
insystem_memory_edit |
1.0 |
|
save_report_database
|
report |
2.1 |
|
save_rtl_design
|
interactive_synthesis |
1.0 |
|
sdc_collection_api_ver_1.0
|
dcmd_sdc_collection_api |
1.0.xml |
|
sdc_collection_api_ver_1.0_cmd_dni__add_to_collection
|
dcmd_sdc_collection_api |
1.0 |
|
sdc_collection_api_ver_1.0_cmd_dni__append_to_collection
|
dcmd_sdc_collection_api |
1.0 |
|
sdc_collection_api_ver_1.0_cmd_dni__copy_collection
|
dcmd_sdc_collection_api |
1.0 |
|
sdc_collection_api_ver_1.0_cmd_dni__filter_collection
|
dcmd_sdc_collection_api |
1.0 |
|
sdc_collection_api_ver_1.0_cmd_dni__index_collection
|
dcmd_sdc_collection_api |
1.0 |
|
sdc_collection_api_ver_1.0_cmd_dni__remove_from_collection
|
dcmd_sdc_collection_api |
1.0 |
|
sdc_collection_api_ver_1.0_cmd_dni__sizeof_collection
|
dcmd_sdc_collection_api |
1.0 |
|
sdc_collection_api_ver_1.0_cmd_dni__sort_collection
|
dcmd_sdc_collection_api |
1.0 |
|
sdc_ver_1.0
|
dcmd_sdc |
1.0.xml |
|
sdc_ver_1.0_cmd_dni__all_inputs
|
dcmd_sdc |
1.0 |
|
sdc_ver_1.0_cmd_dni__all_outputs
|
dcmd_sdc |
1.0 |
|
sdc_ver_1.0_cmd_dni__current_design
|
dcmd_sdc |
1.0 |
|
sdc_ver_1.0_cmd_dni__current_instance
|
dcmd_sdc |
1.0 |
|
sdc_ver_1.0_cmd_dni__get_cells
|
dcmd_sdc |
1.0 |
|
sdc_ver_1.0_cmd_dni__get_designs
|
dcmd_sdc |
1.0 |
|
sdc_ver_1.0_cmd_dni__get_nets
|
dcmd_sdc |
1.0 |
|
sdc_ver_1.0_cmd_dni__get_ports
|
dcmd_sdc |
1.0 |
|
set_active_clocks
|
sdc_ext |
2.0 |
|
set_active_interface
|
external_memif_toolkit |
1.0 |
|
set_annotated_delay
|
sdc_ext |
2.0 |
|
set_assignment
|
names |
1.0 |
|
set_batch_mode
|
chip_planner |
2.0 |
|
set_clock_groups
|
sdc |
1.5 |
|
set_clock_latency
|
sdc |
1.5 |
|
set_clock_uncertainty
|
sdc |
1.5 |
|
set_current_revision
|
project |
7.0 |
|
set_disable_timing
|
sdc |
1.5 |
|
set_false_path
|
sdc |
1.5 |
|
set_global_assignment
|
project |
7.0 |
|
set_high_effort_fmax_optimization_assignments
|
project |
7.0 |
|
set_input_delay
|
sdc |
1.5 |
|
set_input_transition
|
sdc |
1.5 |
|
set_instance_assignment
|
project |
7.0 |
|
set_io_assignment
|
project |
7.0 |
|
set_location_assignment
|
project |
7.0 |
|
set_max_delay
|
sdc |
1.5 |
|
set_max_skew
|
sdc_ext |
2.0 |
|
set_max_time_borrow
|
sdc |
1.5 |
|
set_min_delay
|
sdc |
1.5 |
|
set_multicycle_assignment
|
project |
5.0 |
|
set_multicycle_path
|
sdc |
1.5 |
|
set_net_delay
|
sdc_ext |
2.0 |
|
set_operating_conditions
|
sta |
1.0 |
|
set_output_delay
|
sdc |
1.5 |
|
set_parameter
|
project |
7.0 |
|
set_project_settings
|
project |
1.0 |
|
set_scc_mode
|
sdc_ext |
2.0 |
|
set_stress_pattern
|
external_memif_toolkit |
1.0 |
|
set_time_format
|
sdc_ext |
2.0 |
|
set_timing_cut_assignment
|
project |
5.0 |
|
set_timing_derate
|
sdc_ext |
2.0 |
|
set_user_option
|
project |
7.0 |
|
setup
|
fif |
1.0 |
|
setup_sdm_based_fpga
|
fif |
1.0 |
|
start_insystem_source_probe
|
insystem_source_probe |
1.0 |
|
stop
|
stp |
1.0 |
|
stopwatch
|
misc |
1.0 |
|
synth__analyze_files
|
synth |
1.0 |
|
synth__annotate_sweep_hints
|
synth |
1.0 |
|
synth__debug_dump
|
synth |
1.0 |
|
synth__elaborate
|
synth |
1.0 |
|
synth__export_ddm_to_qdb
|
synth |
1.0 |
|
synth__prima_techmap
|
synth |
1.0 |
|
synth__propagate_constraints
|
synth |
1.0 |
|
synth__set_design
|
synth |
1.0 |
|
synth__stats
|
synth |
1.0 |
|
synth__sweep
|
synth |
1.0 |
|
synthesize
|
interactive_synthesis |
1.0 |
|
terminate
|
fif |
1.0 |
|
terminate_connection
|
external_memif_toolkit |
1.0 |
|
terminate_connections
|
external_memif_toolkit |
1.0 |
|
test
|
pfg |
1.0 |
|
test_assignment_trait
|
project |
7.0 |
|
timegroup
|
project |
4.0 |
|
timing_netlist_exist
|
sta |
1.0 |
|
tristate_output_pin
|
logic_analyzer_interface |
1.0 |
|
uniquify
|
interactive_synthesis |
1.0 |
|
unlink_project_from_device
|
external_memif_toolkit |
1.0 |
|
unload_report
|
report |
2.1 |
|
uno__write_verilog
|
uno |
1.0 |
|
unplace_node
|
eco |
1.0 |
|
update_content_to_memory_from_file
|
insystem_memory_edit |
1.0 |
|
update_mif_files
|
eco |
1.0 |
|
update_timing_netlist
|
sta |
1.0 |
|
use_timing_analyzer_style_escaping
|
sta |
1.0 |
|
write_connection_target_report
|
external_memif_toolkit |
1.0 |
|
write_content_to_memory
|
insystem_memory_edit |
1.0 |
|
write_flow_assignment_digest
|
flow |
1.1 |
|
write_flow_finished
|
flow |
1.1 |
|
write_flow_started
|
flow |
1.1 |
|
write_flow_template
|
flow |
1.1 |
|
write_rtl_report
|
interactive_synthesis |
1.0 |
|
write_sdc
|
sta |
1.0 |
|
write_source_data
|
insystem_source_probe |
1.0 |
|
write_xml_report
|
report |
2.1 |