Allows you to create, view, and edit LogicLock region node assignments.

• Name—Displays the name of the currently selected LogicLock region.

• Members—Displays information about the nodes and paths assigned to the currently selected LogicLock region.

• Design Element—Displays the nodes and paths assigned to the currently selected LogicLock region. You can remove a node or entity from this LogicLock region by right-clicking the node or entity, and then clicking Delete.

• Excluded Element Types—Displays the element types (for example, combinational registers, DSP blocks) that are not required to be inside the region. Excluded element types are specified in the Excluded Element Types dialog box.

• Region—Displays the name of the LogicLock region to which the design element is assigned.

• Add—Opens the Add Node dialog box, which allows you to add nodes and entity instances to the selected LogicLock region.

• Edit—Opens the Edit Node dialog box, which allows you to edit the selected nodes or entity instances.

• Delete—Deletes the selected member from the LogicLock region.

• Priority—Opens the Priority dialog box, which allows you to specify the priority of conflicting wildcard assignments. The Fitter attempts to place assignments with a higher priority before placing other assignments.

• Parent region—Allows you to specify the parent region within which the selected LogicLock region resides.
   

  Scripting Information

  Keyword: LL_parent Setting:  <parent_region_name>

• Reserved— Allows you to constrain placement of nodes and entities within the LogicLock region.
  
  When turned on, this option prevents the Fitter from placing nodes that are not assigned to the region inside the boundary of the region. You can reserve an area on a device by creating a fixed-size region with nothing assigned to it, and turning on Reserved.
  
  When turned off, this option allows the Fitter to place nodes that are not assigned to the region inside the boundary of the region.
   

  Scripting Information

  Keyword:  LL_RESERVED Setting:  off *default

• Enabled— Allows you to enable or disable the selected LogicLock region. When you turn off this option, you direct the Fitter to ignore design element assignments to the LogicLock region. You can use this option to temporarily remove LogicLock placement constraint assignments from a subsequent compilation without deleting the assignments.

Scripting Information

Keyword:  ll_enabled Settings:  on | off *default

Allows you to view and change the size and location of the currently selected LogicLock region.

• Size— Allows you to set the width and height of the currently selected LogicLock region.

• Auto (Let the Fitter decide)— When turned on, directs the Quartus II software to determine an optimal size for the region during compilation. When turned off, allows you to set the width and height of the currently selected LogicLock region to the values you specify in the Width (columns) and Height (rows) boxes.

Scripting Information

Keyword: ll_auto_size Settings:  on | off Keyword: ll_state Settings:  locked | floating *default

• Width (columns)— Specifies a width in units of columns.

Scripting Information

Keyword: ll_width Settings:  <integer>

• Height (rows)— Specifies a height in units of rows.

Scripting Information

Keyword: ll_height Settings:  <integer>

• Origin— Allows you to specify the location of the currently selected LogicLock region origin. The origin specifies the location of the bottom-left corner of the region.

• Floating (let the Fitter decide)— Turn on this option to direct the Quartus II software to determine the location of the LogicLock region during compilation. Turn off this option if you want to specify the location in the Location string box.

Scripting Information

Keyword:   ll_member_state Settings:  locked | floating *default

• Location string— Allows you to specify the location of the LogicLock region origin. If you want to specify a location, you must first turn off Floating (Let the Fitter decide).

Scripting Information

Keyword:  ll_origin Settings:  X<column number>_Y<row number>

• Available resource— Displays the number of available logic elements and embedded cells in the LogicLock region.

• Set Size and Origin to Previous Fitter Results— Allows you to preserve the size and location of the LogicLock region generated during the most recent compilation, in the next compilation.

• Set to Estimated Size— Directs the Fitter to assign a width and height to the LogicLock region, based on an estimate of the size required to contain the design elements assigned to the LogicLock region.

Displays post-compilation statistics for the selected LogicLock region.

• Show All Regions— Displays post-compilation statistics for all LogicLock regions in the design.

In designs that use the Quartus II Design Separation flow with Cyclone III LS devices, the Security tab allows you to assign security attributes to signals entering or exiting secure LogicLock regions.

• Security attribute— Allows you to specify the Security attribute of the currently selected LogicLock region.

• Security Routing Interface— Specifies that only routing resources can be assigned to the currently selected LogicLock region. A LogicLock region with its Security Attribute set to Security Routing Interface creates a routing channel to and from a secured region (a LogicLock region with Security Attribute set to 1 or 2). Each signal entering or leaving a secured region must be assigned to a security routing interface with the Security tab of the LogicLock Regions Properties dialog box.
   

  Scripting Information

  Keyword: LL_SECURITY_ROUTING_INTERFACE ON Settings:  on | off *default

• Unsecured— Specifies that the currently selected LogicLock region is unsecured. LABs bordering the currently selected LogicLock region can be used in the design.

• 1— Specifies that the currently selected LogicLock region is secured. Creates a fencing region (with a LAB width of one) around the currently selected LogicLock region. LABs within the fencing region cannot be used in the design.

  Scripting Information

  Keyword: LL_REGION_SECURITY_LEVEL 1

• 2— Specifies that the currently selected LogicLock region is secured. Creates a fencing region (with a LAB width of one) around the currently selected LogicLock region. LABs within the fencing region cannot be used in the design.

  Scripting Information

  Keyword: LL_REGION_SECURITY_LEVEL 2

In the current release of the Quartus II software, the implementation of Security Attributes 1 and 2 is the same.

• Signals

• Signal— Displays the names of all signals entering and exiting the currently selected LogicLock region

• Security Level— Displays the security level of the selected signal.

• Security Routing Interface— Displays the name of the Security routing interface LogicLock region that the selected signal is routed through.

• Type— Displays whether the signal enters the currently selected LogicLock region (Region input) or exits it (Region output).

• Add— Opens the Add Security Assignments for Signal dialog box, which allows you to assign a signal to a Security routing interface LogicLock region.

• Edit— Opens the Edit Security Assignments for Signal dialog box, which allows you to edit the Security level and Security routing interface assignment of the currently selected signal.

Allows you to preserve the current placement of LogicLock region members in future compilations for supported device(MAX II) families.

 

Notes:   To preserve synthesis and fitting results, Altera recommends that you use incremental compilation rather than LogicLock back-annotation.

 

Content back-annotation preserves the location of the nodes assigned to a LogicLock region relative to the origin of that region. LogicLock back-annotation allows you to move a LogicLock region to a new location or to export the LogicLock region to another project while maintaining relative placement of nodes within the region.

• Back-Annotate Contents— Opens the Back-Annotate Assignments dialog box, which allows you to back-annotate the nodes of the currently selected LogicLock region or regions.

• Delete Back-Annotated Contents— Allows you to delete back-annotated LogicLock node locations in the currently selected LogicLock region. When you click Delete Back-Annotated Assignments, you delete all back-annotated node locations in the selected region. If that region has child LogicLock regions, the Quartus II software prompts you to decide whether to delete all back-annotated node locations in the child regions as well. If you click Yes, you delete all back-annotated node locations in the selected region and in its descendant regions. If you click No, you delete only back-annotated node locations in the selected region.

• Disable back-annotated contents— Allows you to disable back-annotated node locations in the currently selected LogicLock region. The Compiler ignores disabled back-annotated node locations, but they remain in the Quartus II Settings File (.qsf). When you turn on Disable back-annotated contents, you disable all back-annotated node locations in the selected region. Child regions are not affected unless you select them.

• Back-annotated nodes—Displays the names of all back-annotated nodes in the currently selected LogicLock region.

• Populate List—Refreshes the Back-annotated nodes list.