QSPI Flash Controller Module Registers Address Map
Registers in the QSPI Flash Controller module accessible via its APB
slave
Base Address: 0xFF705000
QSPI Flash Controller Module Registers
| Register | Offset | Width | Access | Reset Value | Description |
|---|---|---|---|---|---|
| cfg | 0x0 | 32 | RW | 0x780000 | QSPI Configuration Register |
| devrd | 0x4 | 32 | RW | 0x3 | Device Read Instruction Register |
| devwr | 0x8 | 32 | RW | 0x2 | Device Write Instruction Register |
| delay | 0xC | 32 | RW | 0x0 | QSPI Device Delay Register |
| rddatacap | 0x10 | 32 | RW | 0x1 | Read Data Capture Register |
| devsz | 0x14 | 32 | RW | 0x101002 | Device Size Register |
| srampart | 0x18 | 32 | RW | 0x40 | SRAM Partition Register |
| indaddrtrig | 0x1C | 32 | RW | 0x0 | Indirect AHB Address Trigger Register |
| dmaper | 0x20 | 32 | RW | 0x0 | DMA Peripheral Register |
| remapaddr | 0x24 | 32 | RW | 0x0 | Remap Address Register |
| modebit | 0x28 | 32 | RW | 0x0 | Mode Bit Register |
| sramfill | 0x2C | 32 | RO | 0x0 | SRAM Fill Register |
| txthresh | 0x30 | 32 | RW | 0x1 | TX Threshold Register |
| rxthresh | 0x34 | 32 | RW | 0x1 | RX Threshold Register |
| irqstat | 0x40 | 32 | RW | 0x100 | Interrupt Status Register |
| irqmask | 0x44 | 32 | RW | 0x0 | Interrupt Mask |
| lowwrprot | 0x50 | 32 | RW | 0x0 | Lower Write Protection Register |
| uppwrprot | 0x54 | 32 | RW | 0x0 | Upper Write Protection Register |
| wrprot | 0x58 | 32 | RW | 0x0 | Write Protection Register |
| indrd | 0x60 | 32 | RW | 0x0 | Indirect Read Transfer Register |
| indrdwater | 0x64 | 32 | RW | 0x0 | Indirect Read Transfer Watermark Register |
| indrdstaddr | 0x68 | 32 | RW | 0x0 | Indirect Read Transfer Start Address Register |
| indrdcnt | 0x6C | 32 | RW | 0x0 | Indirect Read Transfer Number Bytes Register |
| indwr | 0x70 | 32 | RW | 0x0 | Indirect Write Transfer Register |
| indwrwater | 0x74 | 32 | RW | 0xFFFFFFFF | Indirect Write Transfer Watermark Register |
| indwrstaddr | 0x78 | 32 | RW | 0x0 | Indirect Write Transfer Start Address Register |
| indwrcnt | 0x7C | 32 | RW | 0x0 | Indirect Write Transfer Count Register |
| flashcmd | 0x90 | 32 | RW | 0x0 | Flash Command Register |
| flashcmdaddr | 0x94 | 32 | RW | 0x0 | Flash Command Address Registers |
| flashcmdrddatalo | 0xA0 | 32 | RW | 0x0 | Flash Command Read Data Register (Lower) |
| flashcmdrddataup | 0xA4 | 32 | RW | 0x0 | Flash Command Read Data Register (Upper) |
| flashcmdwrdatalo | 0xA8 | 32 | RW | 0x0 | Flash Command Write Data Register (Lower) |
| flashcmdwrdataup | 0xAC | 32 | RW | 0x0 | Flash Command Write Data Register (Upper) |
| moduleid | 0xFC | 32 | RO | 0x1001 | Module ID Register |